1. Field of the Invention
The present invention relates to a semiconductor device, and an operating device, a signal converter, and a signal processing system using the semiconductor device and, more particularly, to a semiconductor device which can perform parallel arithmetic operations, and an operating device which can perform an arithmetic operation such as a correlation arithmetic operation, a signal converter for A/D (analog-to-digital) or D/A (digital-to-analog) converting a signal, and a signal processing system using the semiconductor device.
2. Related Background Art
In a conventional semiconductor device that performs parallel arithmetic operation processing, since the circuit scale increases in progression as the number of signals to be subjected to parallel arithmetic operations increases, the manufacturing cost increases, and the yield is lowered. Due to an increase in delay amount of, e.g., wiring lines or due to an increase in the number of times of arithmetic operations in the circuit upon an increase in circuit scale, the operation speed decreases. Furthermore, the consumption power increases considerably.
For example, in the case of a solid-state image pickup device shown in FIG. 1, time-series analog signals output from a sensing unit 60, in which image pickup elements 41 are arranged two-dimensionally, and which serves as an area sensor, are converted into digital signals by an A/D converter 40, and are temporarily stored in a frame memory 39. These signals are processed by an arithmetic operation circuit 38, and the processed signals are output from an arithmetic operation output circuit 50. More specifically, by executing a correlation arithmetic operation between data obtained at different times, the moving amount (.DELTA.X, .DELTA.Y) of an object or the like can be output.
However, in order to perform real-time processing of a dynamic image, the number of processing steps in the arithmetic operation processing and the number of processing stages become very large, and in order to obtain images with higher reality, the circuit scale increases in progression, resulting in a low processing speed. For example, a demand has arisen for an apparatus which can process an MPEG2 method proposed as a dynamic image expansion/compression method at a practical speed.
As the problems of the above-mentioned parallel arithmetic operation processing, the problem of a decrease in operation speed and the problem of an increase in consumption power upon an increase in circuit scale are posed. As a result, the problem of an increase in manufacturing cost and the problem of a decrease in manufacturing yield are posed.
Furthermore, a majority logic circuit effective for the arithmetic operation processing circuit is disclosed in Nikkei Electronics "Economical Majority Logic IC Realized by CMOS", 1973, 11. 5. pp. 132-144, as one of digital signal processing methods. This reference discloses a circuit based on a CMOS technique. In this case as well, since the number of elements based on the CMOS technique increases, and the number of stages in the arithmetic operation processing increases, the problems of an increase in circuit scale, an increase in consumption power, and a decrease in operation speed are similarly posed.